CD74HCT107 - 具有复位功能的高速 CMOS 逻辑双路下降沿 J-K 触发器

CD74HCT107是TI德州仪器公司的一款J-K触发器产品，CD74HCT107是具有复位功能的高速 CMOS 逻辑双路下降沿 J-K 触发器，本站介绍了CD74HCT107的封装应用图解、特点和优点、功能等，并给出了与CD74HCT107相关的TI元器件型号供参考。

CD74HCT107 - 具有复位功能的高速 CMOS 逻辑双路下降沿 J-K 触发器 - J-K触发器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

The ’HC107 and ’HCT107 utilize silicon gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads.

These flip-flops have independent J, K, Reset and Clock inputs and Q and Q\ outputs. They change state on the negative-going transition of the clock pulse. Reset is accomplished asynchronously by a low level input.

This device is functionally identical to the HC/HCT73 but differs in terminal assignment and in some parametric limits.

The HCT logic family is functionally as well as pin compatible with the standard LS family.

产品特性

Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times
Asynchronous Reset
Complementary Outputs
Buffered Inputs
Typical fMAX = 60MHz at VCC = 5V, CL = 15pF, TA = 25°C
Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Wide Operating Temperature Range . . . -55°C to 125°C
Balanced Propagation Delay and Transition Times
Significant Power Reduction Compared to LSTTL Logic ICs
HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH

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