SN54LS390 - 双路 4 位十进制和二进制计数器

SN54LS390是TI德州仪器公司的一款计数器/算术/奇偶校验功能产品，SN54LS390是双路 4 位十进制和二进制计数器，本站介绍了SN54LS390的封装应用图解、特点和优点、功能等，并给出了与SN54LS390相关的TI元器件型号供参考。

SN54LS390 - 双路 4 位十进制和二进制计数器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - 德州仪器

产品描述

Each of these monolithic circuits contains eight master-slave flip-flops and additional gating to implement two individual four-bit counters in a single package. The '390 and 'LS390 incorporate dual divide-by-two and divide-by-five counters, which can be used to implement cycle lengths equal to any whole and/or cumulative multiples of 2 and/or 5 up to divide-by-100. When connected as a bi-quinary counter, the separate divide-by-two circuit can be used to provide symmetry (a square wave) at the final output stage. The '393 and 'LS393 each comprise two independent four-bit binary counters each having a clear and a clock input. N-bit binary counters can be implemented with each package providing the capability of divide-by-256. The '390, 'LS390, '393, and 'LS393 have parallel outputs from each counter stage so that any submultiple of the input count frequency is available for system-timing signals. Series 54 and Series 54LS circuits are characterized for operation over the full military temperature range of -55°C to 125°C; Series 74 and Series 74LS circuits are characterized for operation from 0°C to 70°C.

产品特性

Dual Versions of the Popular '90A, 'LS90 and '93A, 'LS93
'390, 'LS390 … Individual Clocks for A and B Flip-Flops Provide Dual ÷ 2 and ÷ 5 Counters
'393, 'LS393 … Dual 4-Bit Binary Counter with Individual Clocks
All Have Direct Clear for Each 4-Bit Counter
Dual 4-Bit Versions Can Significantly Improve System Densities by Reducing Counter Package Count by 50%
Typical Maximum Count Frequency … 35 MHz
Buffered Outputs Reduce Possibility of Collector Commutation

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