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SN65LVDS048A - 具有直通式引脚的四路 LVDS 接收器
SN65LVDS048A是TI德州仪器公司的一款LVDSPHY(<800Mbps)产品,SN65LVDS048A是具有直通式引脚的四路 LVDS 接收器,本站介绍了SN65LVDS048A的封装应用图解、特点和优点、功能等,并给出了与SN65LVDS048A相关的TI元器件型号供参考。
SN65LVDS048A - 具有直通式引脚的四路 LVDS 接收器 - LVDSPHY(<800Mbps) - LVDS/M-LVDS/ECL/CML - 德州仪器
The SN65LVDS048A is a quad differential line receiver that implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the quad differential receivers will provide a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.
The SN65LVDS048A is characterized for operation from 40°C to 85°C.
- >400 Mbps (200 MHz) Signaling Rates
- Flow-Through Pinout Simplifies PCB Layout
- 50 ps Channel-to-Channel Skew (Typ)
- 200 ps Differential Skew (Typ)
- Propagation Delay Times 2.7 ns (Typ)
- 3.3-V Power Supply Design
- High Impedance LVDS Inputs on Power Down
- Low-Power Dissipation (40 mW at 3.3 V Static)
- Accepts Small Swing (350 mV) Differential Signal Levels
- Supports Open, Short, and Terminated Input Fail-Safe
- Industrial Operating Temperature Range (40°C to 85°C)
- Conforms to TIA/EIA-644 LVDS Standard
- Available in SOIC and TSSOP Packages
- Pin-Compatible With DS90LV048A From National
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