SN74ALVCH16271 - 具有三态输出的 12 位到 24 位多路复用总线交换器

SN74ALVCH16271是TI德州仪器公司的一款通用总线交换器(UBE)产品，SN74ALVCH16271是具有三态输出的 12 位到 24 位多路复用总线交换器，本站介绍了SN74ALVCH16271的封装应用图解、特点和优点、功能等，并给出了与SN74ALVCH16271相关的TI元器件型号供参考。

SN74ALVCH16271 - 具有三态输出的 12 位到 24 位多路复用总线交换器 - 通用总线交换器(UBE) - 通用总线功能 - 德州仪器

产品描述

This 12-bit to 24-bit bus exchanger is designed for 1.65-V to 3.6-V VCC operation.

The SN74ALVCH16271 is intended for applications in which two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. This device is particularly suitable as an interface between conventional DRAMs and high-speed microprocessors.

A data is stored in the internal A-to-B registers on the low-to-high transition of the clock (CLK) input, provided that the clock-enable (CLKENA\) inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B port.

Transparent latches in the B-to-A path allow asynchronous operation to maximize memory access throughput. These latches transfer data when the latch-enable (LE\) inputs are low. The select (SEL\) line selects 1B or 2B data for the A outputs. Data flow is controlled by the active-low output enables (OEA\, OEB\).

To ensure the high-impedance state during power up or power down, the output enables should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

产品特性

Member of Texas Instruments Widebus™Family
Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)

Widebus is a trademark of Texas Instruments.

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