TFP501 - PanelBus HDCP 数字接收器

TFP501是TI德州仪器公司的一款PanelBus(DVI)产品，TFP501是PanelBus HDCP 数字接收器，本站介绍了TFP501的封装应用图解、特点和优点、功能等，并给出了与TFP501相关的TI元器件型号供参考。

TFP501 - PanelBus HDCP 数字接收器 - PanelBus(DVI) - 显示和成像串行器/解串器 - 德州仪器

产品描述

The TFP501 is a Texas Instruments PanelBus flat panel display product, part of a comprehensive family of end-to-end DVI 1.0-compliant solutions. Targeted primarily at desktop LCD monitors, DLP and LCD projectors, and digital TVs, the TFP501 finds applications in any design requiring high-speed digital interface with the additional benefit of an extremely robust and innovative encryption scheme for digital content protection.

The TFP501 supports display resolutions up to 1080p and WUXGA in 24-bit true color pixel format. The TFP501 offers design flexibility to drive one or two pixels per clock, supports TFT or DSTN panels, and provides an option for time staggered pixel outputs for reduced ground-bounce.

PowerPAD advanced packaging technology results in best-of-class power dissipation, footprint, and ultra-low ground inductance.

The TFP501 combines PanelBus circuit innovation and unique implementation for HDCP key protection with TI’s advanced 0.18 µm EPIC-5 CMOS process technology to achieve a completely secure, reliable, low-powered, low noise, high-speed digital interface solution.

产品特性

Supports Pixel Rates Up to 165 MHz (including 1080p and WUXGA at 60Hz)
Digital Visual Interface (DVI) and High-Bandwidth Digital Content Proataection (HDCP) Specification Compliant(1)
Encrypted External HDCP Device Key Storage for Exceptional Security and Ease of Implementation
True-Color, 24 Bits/Pixel, 48-bit Dual Pixel Output Mode, 16.7M Colors at 1 or 2 Pixels Per Clock
Laser Trimmed (50-Ω) Input Stage for Optimum Fixed Impedance Matching
Skew Tolerant up to One Pixel Clock Cycle (High Clock and Data Jitter Tolerance)
4x Over-Sampling for Reduced Bit-Error Rates and Better Performance Over Longer Cables
Reduced Power Consumption From 1.8-V Core Operation With 3.3-V I/O’s and SuppliesThe TFP501 has an internal voltage regulator that provides the 1.8 V core power supply from the externally supplied 3.3 V supplies.
Reduced Ground-Bounce Using Time Staggered Pixel Outputs
Lowest Noise and Best Power Dissipation Using TI 100-pin TQFP PowerPAD Packaging
Advanced Technology Using TI’s 0.18-mm EPIC-5 CMOS Process
Supports Hot Plug Detection

(1) The digital visual interface (DVI) specification is an industry standard developed by the digital display working group (DDWG) for high-speed digital connection to digital displays. The high-bandwidth digital content protection system (HDCP) is an industry standard for protecting DVI outputs from being copied. HDCP was developed by Intel Corporation and is licensed by the Digital Content Protection, LLC. The TFP501 is compliant to the DVI Rev. 1.0 and HDCP Rev. 1.0 specifications.

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