

- PCM1750U - 集成电路(IC) > 数据采集 > ADC/DAC - 特殊用途
- LM36010EVM - 开发板,套件,编程器 > 评估板 > LED 驱动器评估板
- LM4938MHX - 集成电路(IC) > 线性 > 放大器 > 音频放大器
- TWL6032A1BEYFFR - 集成电路(IC) > 电源管理(PMIC) > 电源管理 - 专用
- MSP430F4783IPZR - 集成电路(IC) > 嵌入式 > 微控制器
- LM1246AAC/NA/NOPB - 集成电路(IC) > 线性 > 视频处理
- BUF634ADEVM - 开发板,套件,编程器 > 评估板 > 运算放大器评估板
- SN74ABTH16460DL - 集成电路(IC) > 逻辑 > 专用逻辑器件
- LM3S310-EQN25-C2T - 集成电路(IC) > 嵌入式 > 微控制器
- LM4128AMF-3.3/NOPB - 集成电路(IC) > 电源管理(PMIC) > 电压基准
- PTH05000WAD - 板安装电源 > 直流转换器
- TPS563212EVM - 开发板,套件,编程器 > 评估板 > DC/DC 和 AC/DC(离线)SMPS 评估板
- LP5891QRRFRQ1 - 集成电路(IC) > 电源管理(PMIC) > LED 驱动器
- BQ27500YZGR-V130 - 集成电路(IC) > 电源管理(PMIC) > 电池管理
- LP3852ESX-1.8/NOPB - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- SN74ABT241ADBR - 集成电路(IC) > 逻辑 > 缓冲器,驱动器,接收器,收发器
- LP3872EMPX-2.5 - 集成电路(IC) > 电源管理(PMIC) > 稳压器 - 线性
- INA310B2IDGKR - 集成电路(IC) > 线性 > 放大器 > 仪器,运算放大器,缓冲器
- ULN2003AIDR - 分立半导体产品 > 晶体管 > 双极(BJT) > 双极晶体管阵列
- LM339NSR - 集成电路(IC) > 线性 > 比较器



TPS70151 - 双路输出 LDO 稳压器
TPS70151是TI德州仪器公司的一款多通道LDO产品,TPS70151是双路输出 LDO 稳压器,本站介绍了TPS70151的封装应用图解、特点和优点、功能等,并给出了与TPS70151相关的TI元器件型号供参考。
TPS70151 - 双路输出 LDO 稳压器 - 多通道LDO - 线性稳压器(LDO) - 德州仪器
TPS701xx family devices are designed to provide a complete power management solution for the TMS320 DSP family, processor power, ASIC, FPGA, and digital applications where dual output voltage regulators are required. Easy programmability of the sequencing function makes the TPS701xx family ideal for any TMS320 DSP applications with power sequencing requirements. Differentiated features, such as accuracy, fast transient response, SVS supervisory circuit, manual reset inputs, and an enable function, provide a complete system solution.
The TPS701xx family of voltage regulators offer very low dropout voltage and dual outputs with power-up sequence control, which is designed primarily for DSP applications. These devices have extremely low noise output performance without using any added filter bypass capacitors and are designed to have a fast transient response and be stable with 10µF low ESR capacitors.
These devices have fixed 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, 3.3V/1.2V, and adjustable/adjustable voltage options. Regulator 1 can support up to 500mA, and regulator 2 can support up to 250mA. Separate voltage inputs allow the designer to configure the source power.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 170mV on regulator 1) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (maximum of 230µA over the full range of output current). This LDO family also features a sleep mode; applying a high signal to EN (enable) shuts down both regulators, reducing the input current to 1µA at TJ = +25°C.
The device is enabled when the EN pin is connected to a low-level input voltage. The output voltages of the two regulators are sensed at the VSENSE1 and VSENSE2 pins, respectively.
The input signal at the SEQ pin controls the power-up sequence of the two regulators. When the device is enabled and the SEQ terminal is pulled high or left open, VOUT2 turns on first and VOUT1 remains off until VOUT2 reaches approximately 83% of its regulated output voltage. At that time VOUT1 is turned on. If VOUT2 is pulled below 83% (for example, an overload condition), VOUT1 is turned off. Pulling the SEQ terminal low reverses the power-up order and VOUT1 is turned on first. The SEQ pin is connected to an internal pull-up current source.
For each regulator, there is an internal discharge transistor to discharge the output capacitor when the regulator is turned off (disabled).
The PG1 pin reports the voltage conditions at VOUT1, which can be used to implement an SVS for the circuitry supplied by regulator 1.
The TPS701xx features a RESET (SVS, POR, or Power-On Reset). RESET output initiates a reset in DSP systems and related digital applications in the event of an undervoltage condition. RESET indicates the status of VOUT2 and both manual reset pins (MR1 and MR2). When VOUT2 reaches 95% of its regulated voltage and MR1 and MR2 are in the logic high state, RESET goes to a high impedance state after a 120ms delay. RESET goes to the logic low state when the VOUT2 regulated output voltage is pulled below 95% (for example, an overload condition) of its regulated voltage. To monitor VOUT1, the PG1 output pin can be connected to MR1 or MR2.
The device has an undervoltage lockout (UVLO) circuit that prevents the internal regulators from turning on until VIN1 reaches 2.5V.
- Dual Output Voltages for Split-Supply Applications
- Selectable Power-Up Sequencing for DSP Applications
- Output Current Range of 500mA on Regulator 1 and 250mA on Regulator 2
- Fast Transient Response
- Voltage Options: 3.3V/2.5V, 3.3V/1.8V, 3.3V/1.5V, 3.3V/1.2V, and Dual Adjustable Outputs
- Open Drain Power-On Reset with 120ms Delay
- Open Drain Power Good for Regulator 1
- Ultra Low 190µA (typ) Quiescent Current
- 1µA Input Current During Standby
- Low Noise: 65µVRMS Without Bypass Capacitor
- Quick Output Capacitor Discharge Feature
- Two Manual Reset Inputs
- 2% Accuracy Over Load and Temperature
- Undervoltage Lockout (UVLO) Feature
- 20-Pin PowerPAD™ TSSOP Package
- Thermal Shutdown Protection
PowerPAD, TMS320 are trademarks of Texas Instruments. All other trademarks are the property of their respective owners.
- CD4078B-MIL - CMOS 8 输入或非/或门
- SN54ALS30A - 8 输入正与非门
- LM43600-Q1 - 符合汽车应用要求的 SIMPLE SWITCHER? 3.5V 至 36V、500mA 同步降压转换器
- UC385-1 - 快速瞬态响应 5A 低压降稳压器
- DS15EA101 - 具有 LOS 检测功能的 DS15EA101 0.15 至 1.5 Gbps 自适应电缆均衡器
- SN74CBT6845C - 具有预充电输出和 -2V 下冲保护的 8 位 FET 5V 总线开关
- SN75463 - 双路高电压大电流外设驱动器
- SN74HC574 - 具有三态输出的八路边沿 D 类触发器
- SN74LVC16374 - 具有三态输出的 16 位边沿 D 类触发器
- TS5A23159 - 1Ω 5V/3.3V 双通道 SPDT 开关



