CY74FCT2573T - 具有三态输出和串联阻尼电阻的八路 D 类透明锁存器

CY74FCT2573T是TI德州仪器公司的一款D类锁存器产品，CY74FCT2573T是具有三态输出和串联阻尼电阻的八路 D 类透明锁存器，本站介绍了CY74FCT2573T的封装应用图解、特点和优点、功能等，并给出了与CY74FCT2573T相关的TI元器件型号供参考。

CY74FCT2573T - 具有三态输出和串联阻尼电阻的八路 D 类透明锁存器 - D类锁存器 - 触发器/锁存器/寄存器 - 德州仪器

产品描述

The CY74FCT2573T is an 8-bit, high-speed CMOS, TTL-compatible buffered latch with 3-state outputs that is ideal for driving high-capacitance loads, such as memory and address buffers. On-chip 25- termination resistors at the outputs reduce system noise caused by reflections. The CY74FCT2573T can replace the CY74FCT573T to reduce noise in an existing design.

When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

产品特性

Function and Pinout Compatible With the Fastest Bipolar Logic
25- Output Series Resistors Reduce Transmission-Line Reflection Noise
Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions
Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
Ioff Supports Partial-Power-Down Mode Operation
Matched Rise and Fall Times
3-State Outputs
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
Fully Compatible With TTL Input and Output Logic Levels
12-mA Output Sink Current 15-mA Output Source Current

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