SN54LS697 - 具有输出寄存器和多路复用三态输出的同步加/减计数器

SN54LS697是TI德州仪器公司的一款计数器/算术/奇偶校验功能产品，SN54LS697是具有输出寄存器和多路复用三态输出的同步加/减计数器，本站介绍了SN54LS697的封装应用图解、特点和优点、功能等，并给出了与SN54LS697相关的TI元器件型号供参考。

SN54LS697 - 具有输出寄存器和多路复用三态输出的同步加/减计数器 - 计数器/算术/奇偶校验功能 - 特殊逻辑 - 德州仪器

产品描述

These low-power Schottky LSI devices incorporate synchronous up/down counters, four-bit D-type registers, and quadruple two-line to one-line multiplexers with three state outputs in a single 20-pin package. The up/down counters are programmable from the data inputs and feature enable P\ and enable T\ and a ripple-carry output for easy expansion. The register/counter select input R/C\, selects the counter when low and the register when high for the three-state outputs, QA, QB, QC, and QD. These outputs are rated at 12 and 24 milliamperes (54LS/74LS) for good bus driving performance.

Both the counter CCK and register clock RCK are positive-edge triggered. The counter clear CCLR\ is active low and is asynchronous on the 'LS696 and 'LS697, synchronous on the 'LS699. Loading of the counter is accomplished when LOAD\ is taken low and a positive transition occurs on the counter clock CCK.

Expansion is easily accomplished by connecting RCO\ of the first stage to ENT\ of the second stage, etc. All ENP\ inputs can be tied common and used as a master enable or disable control.

产品特性

4-Bit Counters/Registers
Multiplexed Outputs for Counter or Latched Data
3-State Outputs Drive Bus Lines Directly
'LS696 … Decade Counter, Direct Clear'LS697…Binary Counter, Direct Clear'LS699…Binary Counter, Synchronous Clear

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