TS5N118 - 8 选 1 FET 多路复用器/多路解复用器高带宽总线开关

TS5N118是TI德州仪器公司的一款数字多路复用器/多路解复用器产品，TS5N118是8 选 1 FET 多路复用器/多路解复用器高带宽总线开关，本站介绍了TS5N118的封装应用图解、特点和优点、功能等，并给出了与TS5N118相关的TI元器件型号供参考。

TS5N118 - 8 选 1 FET 多路复用器/多路解复用器高带宽总线开关 - 数字多路复用器/多路解复用器 - 多路复用器/多路解复用器(Mux/Demux) - 德州仪器

产品描述

产品特性

Low and Flat ON-State Resistance (ron) Characteristics Over Operating Range (ron = 3 Typ)
0- to 10-V Switching on Data I/O Ports
Bidirectional Data Flow With Near-Zero Propagation Delay
Low Input/Output Capacitance Minimizes Loading and Signal Distortion (Cio(OFF) = 20 pF Max, B Port)
VCC Operating Range From 4.75 V to 5.25 V
Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
ESD Performance Tested Per JESD 22
- 2000-V Human-Body Model (A114-B, Class II)
- 1000-V Charged-Device Model (C101)
Supports Both Digital and Analog Applications
APPLICATIONS
- PCI Interface
- Differential Signal Interface
- Memory Interleaving
- Bus Isolation
- Low-Distortion Signal Gating

DESCRIPTION/ORDERING INFORMATION

The TS5N118 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the TS5N118 provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The TS5N118 is a 1-of-8 multiplexer/demultiplexer with a single output-enable (OE) input. The select (S0, S1, S2) inputs control the data path of the multiplexer/demultiplexer. When OE is low, the multiplexer/demultiplexer is enabled and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is high, the multiplexer/demultiplexer is disabled and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

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