SN74GTL2010 - 10 位钳位电压

SN74GTL2010是TI德州仪器公司的一款无产品，SN74GTL2010是10 位钳位电压，本站介绍了SN74GTL2010的封装应用图解、特点和优点、功能等，并给出了与SN74GTL2010相关的TI元器件型号供参考。

SN74GTL2010 - 10 位钳位电压 - 无 - 背板逻辑器件（GTL/TTL/BTL/ECL收发器/转换器） - 德州仪器

产品描述

产品特性

Provides Bidirectional Voltage Translation With No Direction Control Required
Allows Voltage Level Translation From 1 V up to 5 V
Provides Direct Interface With GTL, GTL+, LVTTL/TTL, and 5-V CMOS Levels
Low On-State Resistance Between Input and Output Pins (Sn/Dn)
Supports Hot Insertion
No Power Supply Required — Will Not Latch Up
5-V-Tolerant Inputs
Low Standby Current
Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-4)
- 1000-V Charged-Device Model (C101)
APPLICATIONS
- Bidirectional or Unidirectional Applications Requiring Voltage-Level Translation From Any Voltage (1 V to 5 V) to Any Voltage (1 V to 5 V)
- Low Voltage Processor I2C Port Translation to 3.3-V and/or 5-V I2C Bus Signal Levels
- GTL/GTL+ Translation to LVTTL/TTL Signal Levels

DESCRIPTION/ORDERING INFORMATION

The GTL2010 provides ten NMOS pass transistors (Sn and Dn) with a common gate (GREF) and a reference transistor (SREF and DREF). The low ON-state resistance of the switch allows connections to be made with minimal propagation delay. With no direction control pin required, the device allows bidirectional voltage translations any voltage (1 V to 5 V) to any voltage (1 V to 5 V).

When the Sn or Dn port is LOW, the clamp is in the ON state and a low-resistance connection exists between the Sn and Dn ports. Assuming the higher voltage is on the Dn port, when the Dn port is HIGH, the voltage on the Sn port is limited to the voltage set by the reference transistor (SREF). When the Sn port is HIGH, the Dn port is pulled to VCC by the pullup resistors.

All transistors in the GTL2010 have the same electrical characteristics, and there is minimal deviation from one output to another in voltage or propagation delay. This offers superior matching over discrete transistor voltage-translation solutions where the fabrication of the transistors is not symmetrical. With all transistors being identical, the reference transistor (SREF/DREF) can be located on any of the other ten matched Sn/Dn transistors, allowing for easier board layout. The translator transistors with integrated ESD circuitry provides excellent ESD protection.

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